Werner Almesberger
2017-04-04 03:51:49 UTC
Last but not least, those boards need programming. I found some
documentation from NXP that suggests that Kinetis devices have a
factory-installed USB-capable boot loader in their Flash [1], but
that doesn't seem to apply to the KL26 chips I have. Maybe this
was only added after Freescale became part of NXP.
[1] http://www.nxp.com/assets/documents/data/en/user-guides/KFLLDRUG.pdf
So we still have to use good old SWD (Serial Wire Debug). In the
past, I soldered wires directly to the test pads, but it would be
much nicer to have a proper programming and testing fixture.
I started to design a modular and general fixture, but that got
unpleasantly complex. Also, once the test points and their
locations have settled, all that flexibility won't be needed.
I especially didn't want to have to make a lot of PCBs for this.
Then it occurred to me that I could probably do it without PCB:
a 3D-printed base can hold the pogo pins at the right locations,
and the remaining wiring is simple enough that no PCB is needed.
This is what the result looks like, top and bottom:
Loading Image...
Loading Image...
I made the holes large enough that the pogo pins would go in most
of the way. Then I heated them with the soldering iron set to 190 C
(PLA gets soft around 180 C) and gently pushed them into the
plastic until they were fully inserted.
Soldering the wires didn't heat up the pogo pins enough to melt
the PLA.
With a PCB inserted, it looks like this:
Loading Image...
And here we have the Ben NanoNote (with UBB) that drives the
signals and runs the Flash programmer:
Loading Image...
Design files (SolveSpace) and wiring diagram (XFig) are here:
https://gitlab.com/anelok/mexp/tree/master/quick
After fixing a few small soldering problems, I got this:
***@BenNanoNote:~# ./cmcu
Cortex M0+
AP #1 ID 0x001c0020 (MDM-AP)
AP #0 ID 0x04770031 (AHB-AP)
Mass-erase: yes, secure: no, backdoor: no
SDID 0x26151502: Kinetis KL26 rev 1.10, 128 kB Flash, 16 kB RAM, 32-pin
UID 0060-00691014-27874e45
***@BenNanoNote:~# ./smcu
Cortex M0+
AP #1 ID 0x001c0020 (MDM-AP)
AP #0 ID 0x04770031 (AHB-AP)
Mass-erase: yes, secure: no, backdoor: no
SDID 0x16151502: Kinetis KL16 rev 1.10, 128 kB Flash, 16 kB RAM, 32-pin
UID 0033-00540007-39494e45
Next is adding the remaining components, restructuring the firmware
for the new dual MCU design, and then adapting the SWD code for the
RF MCU.
- Werner
documentation from NXP that suggests that Kinetis devices have a
factory-installed USB-capable boot loader in their Flash [1], but
that doesn't seem to apply to the KL26 chips I have. Maybe this
was only added after Freescale became part of NXP.
[1] http://www.nxp.com/assets/documents/data/en/user-guides/KFLLDRUG.pdf
So we still have to use good old SWD (Serial Wire Debug). In the
past, I soldered wires directly to the test pads, but it would be
much nicer to have a proper programming and testing fixture.
I started to design a modular and general fixture, but that got
unpleasantly complex. Also, once the test points and their
locations have settled, all that flexibility won't be needed.
I especially didn't want to have to make a lot of PCBs for this.
Then it occurred to me that I could probably do it without PCB:
a 3D-printed base can hold the pogo pins at the right locations,
and the remaining wiring is simple enough that no PCB is needed.
This is what the result looks like, top and bottom:
Loading Image...
Loading Image...
I made the holes large enough that the pogo pins would go in most
of the way. Then I heated them with the soldering iron set to 190 C
(PLA gets soft around 180 C) and gently pushed them into the
plastic until they were fully inserted.
Soldering the wires didn't heat up the pogo pins enough to melt
the PLA.
With a PCB inserted, it looks like this:
Loading Image...
And here we have the Ben NanoNote (with UBB) that drives the
signals and runs the Flash programmer:
Loading Image...
Design files (SolveSpace) and wiring diagram (XFig) are here:
https://gitlab.com/anelok/mexp/tree/master/quick
After fixing a few small soldering problems, I got this:
***@BenNanoNote:~# ./cmcu
Cortex M0+
AP #1 ID 0x001c0020 (MDM-AP)
AP #0 ID 0x04770031 (AHB-AP)
Mass-erase: yes, secure: no, backdoor: no
SDID 0x26151502: Kinetis KL26 rev 1.10, 128 kB Flash, 16 kB RAM, 32-pin
UID 0060-00691014-27874e45
***@BenNanoNote:~# ./smcu
Cortex M0+
AP #1 ID 0x001c0020 (MDM-AP)
AP #0 ID 0x04770031 (AHB-AP)
Mass-erase: yes, secure: no, backdoor: no
SDID 0x16151502: Kinetis KL16 rev 1.10, 128 kB Flash, 16 kB RAM, 32-pin
UID 0033-00540007-39494e45
Next is adding the remaining components, restructuring the firmware
for the new dual MCU design, and then adapting the SWD code for the
RF MCU.
- Werner